1. Field of the Invention
The present invention relates to a method of executing a forming operation to render a resistance value of a variable resistance element capable of transition in a non-volatile semiconductor memory device that uses the variable resistance element whose resistance value is changed by electrical control as a memory cell.
2. Description of the Related Art
In recent years, as a technology for reducing the size of a memory cell, a resistive memory has been proposed which uses a variable resistance element as a memory cell. The variable resistance elements include, for example, a phase change memory element whose resistance value is changed by a variation in state between a crystal state and an amorphous state of a chalcogenide compound, an MRAM element whose resistance value is changed by a tunnel magnetoresistive effect, a memory element of a polymeric ferroelectric RAM (PFRAM) whose resistive element is formed by a conductive polymer, and a ReRAM element whose resistance value is changed by an electric pulse applied.
The variable resistance elements used in ReRAM is divided broadly into two types: one is the type where a resistance change occurs depending on the absence or presence of electric charges trapped by a charge trapping residing on the electrode interface; and the other is the type where a resistance change occurs depending on the absence or presence of a conductive path due to oxygen defect, etc.
It is known that the variable resistance elements in resistive memory have two modes of operation. One is to set a high resistance state and a low resistance state by switching the polarity of the applied voltage, which is referred to as “bipolar type”. The other enables the setting of a high resistance state and a low resistance state by controlling the voltage values and the voltage application time, without switching the polarity of the applied voltage, which is referred to as “unipolar type”.
To achieve high-density memory cell arrays, the unipolar type is preferable. This is because that the unipolar type solution enables, without transistors, cell arrays to be configured by superposing variable resistance elements and rectifier elements, such as diodes, on respective intersections between bit lines and word lines. Moreover, large capacity may be achieved without an increase in cell array area by arranging such memory cell arrays laminated in a three-dimensional manner.
For unipolar-type ReRAM, data is written to a memory cell by applying, for a short period of time, a certain voltage to a variable resistance element. As a result, the variable resistance element changes from a high resistance state to a low resistance state. The operation of changing a variable resistance element from a high resistance state to a low resistance state is hereinafter referred to as the “set operation”. On the other hand, data is erased from a memory cell MC by applying, for a long period of time, a certain voltage that is lower than that applied in the set operation to a variable resistance element in its low resistance state after the set operation. As a result, the variable resistance element changes from a low resistance state to a high resistance state. The operation of changing a variable resistance element from a low resistance state to a high resistance state is hereinafter referred to as the “reset operation”.
The variable resistance element is in a permanent high resistance state in which the resistance value thereof is not changed immediately after the resistive memory is manufactured. It is necessary to perform a forming operation for forming a current path in an initial process, in order to perform the set operation and the reset operation on the variable resistance element. In general, the forming operation is performed by applying a voltage stress higher than a set voltage and a reset voltage to the memory cell in the wafer before a test process. When the forming operation is completed, the resistance value of the variable resistance element is reduced, which results in a rapid increase in current flowing through the variable resistance element. Therefore, in the forming process according to the related art, a tester is used to monitor the current flowing through the variable resistance element and the forming process stops when the current is rapidly increased (Japanese Patent Application Laid-Open No. 2008-227267, Paragraph Nos. 0028 and 0034). Therefore, a circuit for monitoring the current and stopping the forming process is needed.